A semiconductor wafer has been conventionally manufactured according to a procedure as shown in a flowchart of FIG. 7. The conventional method for manufacturing a semiconductor wafer includes: a slicing step for slicing a single crystal rod of silicon or the like into wafers (step 100); a chamfering step for chamfering a peripheral portion of a sliced wafer (step 102); a lapping step for lapping a chamfered wafer (step 104); an etching step for etching a lapped wafer (step 106); and a mirror polishing step for mirror polishing at least a front surface of an etched wafer (step 108). Incidentally, in this specification, a wafer prior to the mirror polishing step is also referred to as a starting wafer.
Of the steps, the chamfering (the chamfering step) is an indispensable step because unless the chamfering step is applied to a wafer peripheral portion, a single crystal of silicon or the like is very hard and brittle so that braking and chipping of a semiconductor wafer occur during a process for manufacturing the semiconductor wafer and a fabrication process for a device, which results in reduction in product yield in the processes and degradation in characteristics of a device. As the chamfering processes, there are known mainly a process rounding a wafer peripheral portion with a chemical method, and a process chamfering a peripheral portion thereof mechanically using a grinding stone. The latter mechanical process has generally been adopted in a recent trend of larger diameter of wafers because of good stability of wafer quality and excellence in dimensional precision.
While it is required to firmly hold a wafer in order to process the periphery thereof by means of a mechanical method, the wafer is held on the main surfaces thereof from the nature of processing the wafer periphery, and in the processing the main surface thereof is subject to scratches and contamination. However, the main surface of the wafer is used as a surface on which a device pattern is illustrated, so the scratches and contamination on the main surface of the wafer has to be avoided at the lowest possible level. Therefore, generally, the chamfering is performed on a wafer immediately after the wafer is obtained by slicing a single crystal rod and thereafter, the main surfaces of the wafer are ground by lapping so as to make wafer thickness uniform, thereby the scratches and contamination on the main surfaces generated during the chamfering being removed.
In the mean time, along with progress toward high integration in the semiconductor technology in recent years, there have been demands for improvement in flatness and dimensional precision of chamfered surfaces of the wafer. Conventionally, the dimensional precision of the chamfered surface has been improved not only by increasing smoothness of the chamfered surface using as a grinding stone abrasive grains with small sizes at the sacrifice of productivity in chamfering, but also by improving precision in a chamfering machine and a control technique therefor.
However, when performing the lapping after the chamfering, reduction occurs in an effect of improvement on quality such as smoothness and dimensional precision of the chamfered surface. The lapping is performed such that a wafer is sandwiched between an upper table and a lower table, a mixture obtained by mixing abrasive grains into a lapping solution (an abrasive agent) is supplied into clearances between the wafer and the upper and lower tables, and the wafer and the tables are rubbed against each other under a pressure applied therebetween to thereby grind the main surfaces of the wafer, in which situation a wafer holding metal jig is used for holding the wafer. The abrasive grains put between the wafer holding metal jig and the wafer to grind the peripheral portion of the wafer, whereby the wafer shape gets worse. Since abrasive grains used in lapping is coarser compared with those used in chamfering, roughness of the chamfered surface increases so that smoothness and dimensional precision of the chamfered surface cannot maintain the level at the time when the chamfering operation ends.
Therefore, there has been a case where chamfering is performed after lapping. With such a process adopted, a semiconductor wafer can be manufactured without losing smoothness and dimensional precision of the chamfered surface at the time when the chamfering operation ends. Furthermore, since thickness of the wafer has been made uniform after the lapping, an advantage is provided that dimensional precision of the chamfered surface can be easily ensured in subsequent chamfering.
Thereafter, acid or alkali etching treatment is performed to remove processing damage or the like generated in lapping and other steps.
Various ways have been available in polishing a wafer and in an example, a wafer is adhered to a polishing block, the wafer on the polishing block is pressed to a polishing cloth stuck on a polishing table and the wafer is polished while being rubbed on the polishing cloth. There have been employed two systems in adhering a wafer to the polishing block: a wax mount system in which a wafer is stuck with wax and a waxless mount system in which a wafer is firmly held by vacuum suction or the like without using wax. The waxless system not only requires neither of an adhering operation of a wafer to a polishing block and a releasing operation of the wafer from the polishing block, but also is easy in cleaning the wafer after polishing; therefore, this system is advantageous in aspects of productivity and cost. However, the waxless system has problems in respect of flatness of the polished wafer, local etching on the back surface of the wafer caused by polishing slurry and others, so the wax mount system stands as the present mainstream.
In one adhering manner of the wax mount system, a wafer is sucked at the front surface thereof with a vacuum suction device, wax is applied on the back surface thereof, the back surface is directed downward, the wafer is released from the vacuum suction device near the polishing block, and by dropping the wafer onto the polishing block due to its own weight, the wafer is adhered to the polishing block. In another adhering manner, using a vacuum suction device provided with an air pad, a wafer coated with wax is pressed to the polishing block at the central portion thereof as it is or in a state where the wafer is bent, in which situation by releasing the wafer from the vacuum suction device, the wafer is adhered to the polishing block. There are used as the polishing block those made of glass such as borosilicate glass, or ceramics such as alumina and silicon carbide. Along with increasingly severer requests for wafer flatness, a polishing block with high rigidity made of ceramics is becoming the mainstream.
There may be also available a method for polishing simultaneously the front and back surfaces of a wafer and a polishing process including a step for lightly polishing the back surface of a wafer to obtain a wafer with high flatness.
Thus, in a prior art practice, a silicon single crystal ingot is sliced into silicon wafers and the following steps are thereafter applied sequentially to the sliced wafer: chamfering, lapping, etching and the like, followed by mirror polishing of at least the wafer main surface. In addition, edge polishing is performed in which the chamfered portion is mirror polished with a cylindrical buff or the like.
While a final configuration of the wafer is determined in a wafer polishing step, wafer flatness in the wafer polishing step is greatly affected by a state of the wafer in the previous steps (steps prior to polishing).
That is, for example, a configuration of a wafer etched in the previous step (hereinafter also referred to as CW for short) exerts an influence on a configuration of a polished wafer. For example, if the wafer is subjected to acid etching, waviness of the wafer is great, so it is difficult to improve flatness of the wafer. By reducing the waviness of the wafer, the flatness thereof is improved. The reduction of the waviness is realized with adoption of a combination of alkali etching and acid etching, improved alkali etching or the like.
To perform alkali etching is advantageous in aspects of improvement of the wafer flatness and reduction of the wafer manufacturing cost, whereas with such an etching solution applied, ring-like sag is observed on an outer peripheral portion of the polished wafer, which leads to local degradation in flatness.
SFQR (Site Front Least Squares Range) within a wafer surface is greatly improved by alkali etching, whereas a value of SFQRmax is worsened due to the sag on the outer peripheral portion as described above; therefore the wafer is not evaluated as one with very high flatness as a whole. Especially, in recent years a wafer is requested with high flatness as far as the very outer peripheral portion thereof, and hence an adverse influence of the sag in the outer peripheral portion has disabled effective use of the merit of the alkali etching.
The term “SFQR (Site Front Least Squares Range)” means a value expressing the maximum value of recessions and projections against an average plane of a front side reference for flatness which is calculated at each site (a value evaluated at each site, that is, the sum of the absolute values of maximum displacements of the + and − sides from the reference plane which is the in-site plane obtained by calculating data in set sites using a method of least squares) and the term “SFQRmax” is the maximum value among the SFQR values of all of the sites on a wafer.
The alkali etched wafer exhibits good SFQR values in the wafer surface but has sag on the outer peripheral portion, so the SFQRmax is present in the outer peripheral portion, which degrades an apparent quality of the wafer.